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@@ -20,6 +20,8 @@ use std::collections::HashSet;
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use tracing::{debug, error, info, warn};
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use tracing::{debug, error, info, warn};
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+use crate::cpu::CpuThread;
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+
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/// CPU detection pub mod cpuid;
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/// CPU detection pub mod cpuid;
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pub mod cpuid;
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pub mod cpuid;
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use cpuid::{CpuInfo, CpuThreads};
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use cpuid::{CpuInfo, CpuThreads};
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@@ -49,7 +51,7 @@ impl RxMsr {
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Self { is_initialized: false, is_enabled: false, cache_qos: false, saved_items: vec![] }
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Self { is_initialized: false, is_enabled: false, cache_qos: false, saved_items: vec![] }
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}
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}
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- pub fn init(&mut self, cache_qos: bool, threads: usize, save: bool) -> bool {
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+ pub fn init(&mut self, cache_qos: bool, threads: &[CpuThread], save: bool) -> bool {
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if self.is_initialized {
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if self.is_initialized {
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return self.is_enabled
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return self.is_enabled
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}
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}
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@@ -101,7 +103,7 @@ impl RxMsr {
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let saved_items = std::mem::take(&mut self.saved_items);
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let saved_items = std::mem::take(&mut self.saved_items);
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- if !self.wrmsr(&saved_items, 0, self.cache_qos, false) {
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+ if !self.wrmsr(&saved_items, &[], self.cache_qos, false) {
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error!("[msr] Failed to restore to initial state");
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error!("[msr] Failed to restore to initial state");
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}
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}
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}
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}
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@@ -109,7 +111,7 @@ impl RxMsr {
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fn wrmsr(
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fn wrmsr(
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&mut self,
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&mut self,
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preset: &[MsrItem],
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preset: &[MsrItem],
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- threads: usize, // TODO: This should be a slice of threads
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+ threads: &[CpuThread],
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cache_qos: bool,
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cache_qos: bool,
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save: bool,
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save: bool,
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) -> bool {
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) -> bool {
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@@ -134,16 +136,13 @@ impl RxMsr {
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}
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}
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// Which CPU cores will have access top the full L3 cache
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// Which CPU cores will have access top the full L3 cache
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- // TODO: Check xmrig/crypto/rx/RxMsr.cpp::wsmsr()
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- //let cpu_threads = CpuThreads::detect();
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- //let units: HashSet<i32> = cpu_threads.thread_ids().into_iter().collect();
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+ let mut cache_enabled: HashSet<i32> = HashSet::new();
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+ let mut cache_qos_disabled = threads.is_empty();
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- let cache_enabled: HashSet<i32> = HashSet::new();
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- //let mut cache_qos_disabled = threads.is_empty();
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- let cache_qos_disabled = true;
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+ if cache_qos {
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+ let cpu_threads = CpuThreads::detect();
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+ let units: HashSet<i32> = cpu_threads.thread_ids().into_iter().collect();
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- /*
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- if cache_qos && !cache_qos_disabled {
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for thread in threads {
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for thread in threads {
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let affinity = thread.affinity();
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let affinity = thread.affinity();
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// If some thread has no affinity or wrong affinity,
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// If some thread has no affinity or wrong affinity,
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@@ -153,12 +152,11 @@ impl RxMsr {
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warn!(
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warn!(
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"Cache QoS can only be enabled when all mining threads have affinity set"
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"Cache QoS can only be enabled when all mining threads have affinity set"
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);
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);
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+ break
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}
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}
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- break
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+ cache_enabled.insert(affinity);
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}
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}
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- cache_enabled.insert(affinity);
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}
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}
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- */
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// Apply MSR values to all CPUs
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// Apply MSR values to all CPUs
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msr.write_all(|cpu| {
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msr.write_all(|cpu| {
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