 tevador
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2b9209346e
Operand allocation
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7 лет назад |
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tevador
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59bbb572c2
WIP
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7 лет назад |
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tevador
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174754cb2b
Added branches - ASM and JIT only
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7 лет назад |
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tevador
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f3b114af88
Replaced division instructions with IMUL_RCP
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7 лет назад |
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tevador
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923420f0a3
Fixed mining and verification mode not giving the same results
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7 лет назад |
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tevador
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f76e8c2e20
Reworked "FNEG" instruction to make ASIC optimizations more difficult
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7 лет назад |
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tevador
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32d827d0a6
Interpreter with bytecode
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7 лет назад |
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tevador
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a586751f6b
Removed FPNEG instruction
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7 лет назад |
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tevador
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ac4462ad42
Renamed floating point instructions
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7 лет назад |
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tevador
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1ee94bef2a
Added ISWAP instruction
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7 лет назад |
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tevador
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8f2abd6c05
NOP instruction
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7 лет назад |
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tevador
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005c67f64c
Added explicit STORE instructions
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7 лет назад |
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tevador
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d2cb086221
ASM code generator for "small" programs that fit into the uOP cache
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7 лет назад |
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tevador
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2756bcdcfe
Added magic division to JIT compiler
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7 лет назад |
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tevador
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557241cd95
JUMP instruction
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7 лет назад |
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tevador
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d1a808643d
Random accesses - JIT compiler
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7 лет назад |
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tevador
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b71e0eec65
Optimizations to reduce code size under 32K
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7 лет назад |
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tevador
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2f6a599ff6
Inlined calls for memory read
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7 лет назад |
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tevador
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619bee5418
Random dataset accesses - asm only
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7 лет назад |
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tevador
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3caecc7646
Vector FPU instructions
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7 лет назад |
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tevador
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cb0721056a
Assembly code generator for Windows 64-bit
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7 лет назад |
