 tevador
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7c012b4fee
Fixed non-portable nonce serialization
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7 лет назад |
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tevador
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f3b114af88
Replaced division instructions with IMUL_RCP
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7 лет назад |
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tevador
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f76e8c2e20
Reworked "FNEG" instruction to make ASIC optimizations more difficult
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7 лет назад |
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tevador
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2798d78717
Render imm32 as signed in RandomX code
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7 лет назад |
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tevador
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32d827d0a6
Interpreter with bytecode
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7 лет назад |
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tevador
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a586751f6b
Removed FPNEG instruction
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7 лет назад |
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tevador
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b417fd08ea
16 -> 8 chained programs
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7 лет назад |
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tevador
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8f2abd6c05
NOP instruction
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7 лет назад |
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tevador
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005c67f64c
Added explicit STORE instructions
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7 лет назад |
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tevador
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d2cb086221
ASM code generator for "small" programs that fit into the uOP cache
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7 лет назад |
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tevador
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16db607025
Scratchpad size increased to 1 MiB
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7 лет назад |
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tevador
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93c324709b
Related to previous changes
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7 лет назад |
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tevador
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a7ffe8c19a
Mix dataset cacheline with registers r0-r7
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7 лет назад |
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tevador
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67e741ff22
Reduced x86 code size by 512 bytes (and ecx -> and eax)
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7 лет назад |
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tevador
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1426fcbab5
Print average program code size
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7 лет назад |
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tevador
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2756bcdcfe
Added magic division to JIT compiler
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7 лет назад |
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tevador
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c02ee4291d
FPROUND - variable flag offset
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7 лет назад |
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tevador
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e487092f07
Simplified CALL and RET
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7 лет назад |
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tevador
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557241cd95
JUMP instruction
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7 лет назад |
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tevador
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d1a808643d
Random accesses - JIT compiler
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7 лет назад |
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tevador
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b71e0eec65
Optimizations to reduce code size under 32K
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7 лет назад |
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tevador
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2f6a599ff6
Inlined calls for memory read
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7 лет назад |
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tevador
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619bee5418
Random dataset accesses - asm only
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7 лет назад |
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tevador
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3caecc7646
Vector FPU instructions
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7 лет назад |
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tevador
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740c40b218
8 branch conditions for CALL/RET
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7 лет назад |
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tevador
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4f276541d2
Modified x86 register allocation
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7 лет назад |
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tevador
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6332831ec1
Implemented cache shift
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7 лет назад |
|
tevador
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cb0721056a
Assembly code generator for Windows 64-bit
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7 лет назад |
