Historique des commits

Auteur SHA1 Message Date
  tevador 7c012b4fee Fixed non-portable nonce serialization il y a 7 ans
  tevador f3b114af88 Replaced division instructions with IMUL_RCP il y a 7 ans
  tevador f76e8c2e20 Reworked "FNEG" instruction to make ASIC optimizations more difficult il y a 7 ans
  tevador 2798d78717 Render imm32 as signed in RandomX code il y a 7 ans
  tevador 32d827d0a6 Interpreter with bytecode il y a 7 ans
  tevador a586751f6b Removed FPNEG instruction il y a 7 ans
  tevador b417fd08ea 16 -> 8 chained programs il y a 7 ans
  tevador 8f2abd6c05 NOP instruction il y a 7 ans
  tevador 005c67f64c Added explicit STORE instructions il y a 7 ans
  tevador d2cb086221 ASM code generator for "small" programs that fit into the uOP cache il y a 7 ans
  tevador 16db607025 Scratchpad size increased to 1 MiB il y a 7 ans
  tevador 93c324709b Related to previous changes il y a 7 ans
  tevador a7ffe8c19a Mix dataset cacheline with registers r0-r7 il y a 7 ans
  tevador 67e741ff22 Reduced x86 code size by 512 bytes (and ecx -> and eax) il y a 7 ans
  tevador 1426fcbab5 Print average program code size il y a 7 ans
  tevador 2756bcdcfe Added magic division to JIT compiler il y a 7 ans
  tevador c02ee4291d FPROUND - variable flag offset il y a 7 ans
  tevador e487092f07 Simplified CALL and RET il y a 7 ans
  tevador 557241cd95 JUMP instruction il y a 7 ans
  tevador d1a808643d Random accesses - JIT compiler il y a 7 ans
  tevador b71e0eec65 Optimizations to reduce code size under 32K il y a 7 ans
  tevador 2f6a599ff6 Inlined calls for memory read il y a 7 ans
  tevador 619bee5418 Random dataset accesses - asm only il y a 7 ans
  tevador 3caecc7646 Vector FPU instructions il y a 7 ans
  tevador 740c40b218 8 branch conditions for CALL/RET il y a 7 ans
  tevador 4f276541d2 Modified x86 register allocation il y a 7 ans
  tevador 6332831ec1 Implemented cache shift il y a 7 ans
  tevador cb0721056a Assembly code generator for Windows 64-bit il y a 7 ans