JitCompilerX86.cpp 21 KB

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  1. /*
  2. Copyright (c) 2018 tevador
  3. This file is part of RandomX.
  4. RandomX is free software: you can redistribute it and/or modify
  5. it under the terms of the GNU General Public License as published by
  6. the Free Software Foundation, either version 3 of the License, or
  7. (at your option) any later version.
  8. RandomX is distributed in the hope that it will be useful,
  9. but WITHOUT ANY WARRANTY; without even the implied warranty of
  10. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  11. GNU General Public License for more details.
  12. You should have received a copy of the GNU General Public License
  13. along with RandomX. If not, see<http://www.gnu.org/licenses/>.
  14. */
  15. #define MAGIC_DIVISION
  16. #include "JitCompilerX86.hpp"
  17. #include "Program.hpp"
  18. #include <cstring>
  19. #include <stdexcept>
  20. #ifdef MAGIC_DIVISION
  21. #include "divideByConstantCodegen.h"
  22. #endif
  23. #ifdef _WIN32
  24. #include <windows.h>
  25. #else
  26. #include <sys/types.h>
  27. #include <sys/mman.h>
  28. #ifndef MAP_ANONYMOUS
  29. #define MAP_ANONYMOUS MAP_ANON
  30. #endif
  31. #endif
  32. namespace RandomX {
  33. #if !defined(_M_X64) && !defined(__x86_64__)
  34. JitCompilerX86::JitCompilerX86() {
  35. //throw std::runtime_error("JIT compiler only supports x86-64 CPUs");
  36. }
  37. void JitCompilerX86::generateProgram(Program& p) {
  38. }
  39. size_t JitCompilerX86::getCodeSize() {
  40. return 0;
  41. }
  42. #else
  43. /*
  44. REGISTER ALLOCATION:
  45. ; rax -> temporary
  46. ; rbx -> loop counter "lc"
  47. ; rcx -> temporary
  48. ; rdx -> temporary
  49. ; rsi -> scratchpad pointer
  50. ; rdi -> dataset pointer
  51. ; rbp -> memory registers "ma" (high 32 bits), "mx" (low 32 bits)
  52. ; rsp -> stack pointer
  53. ; r8 -> "r0"
  54. ; r9 -> "r1"
  55. ; r10 -> "r2"
  56. ; r11 -> "r3"
  57. ; r12 -> "r4"
  58. ; r13 -> "r5"
  59. ; r14 -> "r6"
  60. ; r15 -> "r7"
  61. ; xmm0 -> "f0"
  62. ; xmm1 -> "f1"
  63. ; xmm2 -> "f2"
  64. ; xmm3 -> "f3"
  65. ; xmm4 -> "e0"
  66. ; xmm5 -> "e1"
  67. ; xmm6 -> "e2"
  68. ; xmm7 -> "e3"
  69. ; xmm8 -> "a0"
  70. ; xmm9 -> "a1"
  71. ; xmm10 -> "a2"
  72. ; xmm11 -> "a3"
  73. ; xmm12 -> temporary
  74. ; xmm13 -> DBL_MIN
  75. ; xmm14 -> absolute value mask 0x7fffffffffffffff7fffffffffffffff
  76. ; xmm15 -> sign mask 0x80000000000000008000000000000000
  77. */
  78. #include "JitCompilerX86-static.hpp"
  79. const uint8_t* codePrologue = (uint8_t*)&randomx_program_prologue;
  80. const uint8_t* codeLoopBegin = (uint8_t*)&randomx_program_loop_begin;
  81. const uint8_t* codeLoopLoad = (uint8_t*)&randomx_program_loop_load;
  82. const uint8_t* codeProgamStart = (uint8_t*)&randomx_program_start;
  83. const uint8_t* codeReadDataset = (uint8_t*)&randomx_program_read_dataset;
  84. const uint8_t* codeLoopStore = (uint8_t*)&randomx_program_loop_store;
  85. const uint8_t* codeLoopEnd = (uint8_t*)&randomx_program_loop_end;
  86. const uint8_t* codeEpilogue = (uint8_t*)&randomx_program_epilogue;
  87. const uint8_t* codeProgramEnd = (uint8_t*)&randomx_program_end;
  88. const int32_t prologueSize = codeLoopBegin - codePrologue;
  89. const int32_t epilogueSize = codeProgramEnd - codeEpilogue;
  90. const int32_t loopLoadSize = codeProgamStart - codeLoopLoad;
  91. const int32_t readDatasetSize = codeLoopStore - codeReadDataset;
  92. const int32_t loopStoreSize = codeLoopEnd - codeLoopStore;
  93. const int32_t epilogueOffset = CodeSize - epilogueSize;
  94. static const uint8_t REX_ADD_RR[] = { 0x4d, 0x03 };
  95. static const uint8_t REX_ADD_RM[] = { 0x4c, 0x03 };
  96. static const uint8_t REX_SUB_RR[] = { 0x4d, 0x2b };
  97. static const uint8_t REX_SUB_RM[] = { 0x4c, 0x2b };
  98. static const uint8_t REX_MOV_RR[] = { 0x41, 0x8b };
  99. static const uint8_t REX_MOV_RR64[] = { 0x49, 0x8b };
  100. static const uint8_t REX_MOV_R64R[] = { 0x4c, 0x8b };
  101. static const uint8_t REX_IMUL_RR[] = { 0x4d, 0x0f, 0xaf };
  102. static const uint8_t REX_IMUL_RRI[] = { 0x4d, 0x69 };
  103. static const uint8_t REX_IMUL_RM[] = { 0x4c, 0x0f, 0xaf };
  104. static const uint8_t REX_MUL_R[] = { 0x49, 0xf7 };
  105. static const uint8_t REX_MUL_M[] = { 0x48, 0xf7 };
  106. static const uint8_t REX_81[] = { 0x49, 0x81 };
  107. static const uint8_t AND_EAX_I = 0x25;
  108. static const uint8_t MOV_EAX_I = 0xb8;
  109. static const uint8_t MOV_RAX_I[] = { 0x48, 0xb8 };
  110. static const uint8_t MOV_RCX_I[] = { 0x48, 0xb9 };
  111. static const uint8_t REX_LEA[] = { 0x4f, 0x8d };
  112. static const uint8_t REX_MUL_MEM[] = { 0x48, 0xf7, 0x24, 0x0e };
  113. static const uint8_t REX_IMUL_MEM[] = { 0x48, 0xf7, 0x2c, 0x0e };
  114. static const uint8_t REX_SHR_RAX[] = { 0x48, 0xc1, 0xe8 };
  115. static const uint8_t RAX_ADD_SBB_1[] = { 0x48, 0x83, 0xC0, 0x01, 0x48, 0x83, 0xD8, 0x00 };
  116. static const uint8_t MUL_RCX[] = { 0x48, 0xf7, 0xe1 };
  117. static const uint8_t REX_SHR_RDX[] = { 0x48, 0xc1, 0xea };
  118. static const uint8_t REX_SH[] = { 0x49, 0xc1 };
  119. static const uint8_t MOV_RCX_RAX_SAR_RCX_63[] = { 0x48, 0x89, 0xc1, 0x48, 0xc1, 0xf9, 0x3f };
  120. static const uint8_t AND_ECX_I[] = { 0x81, 0xe1 };
  121. static const uint8_t ADD_RAX_RCX[] = { 0x48, 0x01, 0xC8 };
  122. static const uint8_t SAR_RAX_I8[] = { 0x48, 0xC1, 0xF8 };
  123. static const uint8_t NEG_RAX[] = { 0x48, 0xF7, 0xD8 };
  124. static const uint8_t ADD_R_RAX[] = { 0x49, 0x01 };
  125. static const uint8_t XOR_EAX_EAX[] = { 0x31, 0xC0 };
  126. static const uint8_t ADD_RDX_R[] = { 0x4c, 0x01 };
  127. static const uint8_t SUB_RDX_R[] = { 0x4c, 0x29 };
  128. static const uint8_t SAR_RDX_I8[] = { 0x48, 0xC1, 0xFA };
  129. static const uint8_t TEST_RDX_RDX[] = { 0x48, 0x85, 0xD2 };
  130. static const uint8_t SETS_AL_ADD_RDX_RAX[] = { 0x0F, 0x98, 0xC0, 0x48, 0x01, 0xC2 };
  131. static const uint8_t REX_NEG[] = { 0x49, 0xF7 };
  132. static const uint8_t REX_XOR_RR[] = { 0x4D, 0x33 };
  133. static const uint8_t REX_XOR_RI[] = { 0x49, 0x81 };
  134. static const uint8_t REX_XOR_RM[] = { 0x4c, 0x33 };
  135. static const uint8_t REX_ROT_CL[] = { 0x49, 0xd3 };
  136. static const uint8_t REX_ROT_I8[] = { 0x49, 0xc1 };
  137. static const uint8_t SHUFPD[] = { 0x66, 0x0f, 0xc6 };
  138. static const uint8_t REX_ADDPD[] = { 0x66, 0x41, 0x0f, 0x58 };
  139. static const uint8_t REX_CVTDQ2PD_XMM12[] = { 0xf3, 0x44, 0x0f, 0xe6, 0x24, 0x06 };
  140. static const uint8_t REX_SUBPD[] = { 0x66, 0x41, 0x0f, 0x5c };
  141. static const uint8_t REX_XORPS[] = { 0x41, 0x0f, 0x57 };
  142. static const uint8_t REX_MULPD[] = { 0x66, 0x41, 0x0f, 0x59 };
  143. static const uint8_t REX_MAXPD[] = { 0x66, 0x41, 0x0f, 0x5f };
  144. static const uint8_t REX_DIVPD[] = { 0x66, 0x41, 0x0f, 0x5e };
  145. static const uint8_t SQRTPD[] = { 0x66, 0x0f, 0x51 };
  146. static const uint8_t AND_OR_MOV_LDMXCSR[] = { 0x25, 0x00, 0x60, 0x00, 0x00, 0x0D, 0xC0, 0x9F, 0x00, 0x00, 0x89, 0x44, 0x24, 0xF8, 0x0F, 0xAE, 0x54, 0x24, 0xF8 };
  147. static const uint8_t ROL_RAX[] = { 0x48, 0xc1, 0xc0 };
  148. static const uint8_t XOR_ECX_ECX[] = { 0x33, 0xC9 };
  149. static const uint8_t REX_CMP_R32I[] = { 0x41, 0x81 };
  150. static const uint8_t REX_CMP_M32I[] = { 0x81, 0x3c, 0x06 };
  151. static const uint8_t MOVAPD[] = { 0x66, 0x0f, 0x29 };
  152. static const uint8_t REX_MOV_MR[] = { 0x4c, 0x89 };
  153. static const uint8_t REX_XOR_EAX[] = { 0x41, 0x33 };
  154. static const uint8_t SUB_EBX[] = { 0x83, 0xEB, 0x01 };
  155. static const uint8_t JNZ[] = { 0x0f, 0x85 };
  156. static const uint8_t JMP = 0xe9;
  157. static const uint8_t REX_XOR_RAX_R64[] = { 0x49, 0x33 };
  158. static const uint8_t REX_XCHG[] = { 0x4d, 0x87 };
  159. static const uint8_t REX_ANDPS_XMM12[] = { 0x41, 0x0f, 0x54, 0xe6 };
  160. static const uint8_t REX_PADD[] = { 0x66, 0x44, 0x0f };
  161. static const uint8_t PADD_OPCODES[] = { 0xfc, 0xfd, 0xfe, 0xd4 };
  162. size_t JitCompilerX86::getCodeSize() {
  163. return codePos - prologueSize;
  164. }
  165. JitCompilerX86::JitCompilerX86() {
  166. #ifdef _WIN32
  167. code = (uint8_t*)VirtualAlloc(nullptr, CodeSize, MEM_COMMIT, PAGE_EXECUTE_READWRITE);
  168. if (code == nullptr)
  169. throw std::runtime_error("VirtualAlloc failed");
  170. #else
  171. code = (uint8_t*)mmap(nullptr, CodeSize, PROT_READ | PROT_WRITE | PROT_EXEC, MAP_ANONYMOUS | MAP_PRIVATE, -1, 0);
  172. if (code == (uint8_t*)-1)
  173. throw std::runtime_error("mmap failed");
  174. #endif
  175. memcpy(code, codePrologue, prologueSize);
  176. memcpy(code + CodeSize - epilogueSize, codeEpilogue, epilogueSize);
  177. }
  178. void JitCompilerX86::generateProgram(Program& prog) {
  179. auto addressRegisters = prog.getEntropy(12);
  180. uint32_t readReg0 = 0 + (addressRegisters & 1);
  181. addressRegisters >>= 1;
  182. uint32_t readReg1 = 2 + (addressRegisters & 1);
  183. addressRegisters >>= 1;
  184. uint32_t readReg2 = 4 + (addressRegisters & 1);
  185. addressRegisters >>= 1;
  186. uint32_t readReg3 = 6 + (addressRegisters & 1);
  187. codePos = prologueSize;
  188. emit(REX_XOR_RAX_R64);
  189. emitByte(0xc0 + readReg0);
  190. emit(REX_XOR_RAX_R64);
  191. emitByte(0xc0 + readReg1);
  192. memcpy(code + codePos, codeLoopLoad, loopLoadSize);
  193. codePos += loopLoadSize;
  194. for (unsigned i = 0; i < ProgramLength; ++i) {
  195. Instruction& instr = prog(i);
  196. instr.src %= RegistersCount;
  197. instr.dst %= RegistersCount;
  198. generateCode(instr);
  199. }
  200. emit(REX_MOV_RR);
  201. emitByte(0xc0 + readReg2);
  202. emit(REX_XOR_EAX);
  203. emitByte(0xc0 + readReg3);
  204. memcpy(code + codePos, codeReadDataset, readDatasetSize);
  205. codePos += readDatasetSize;
  206. memcpy(code + codePos, codeLoopStore, loopStoreSize);
  207. codePos += loopStoreSize;
  208. emit(SUB_EBX);
  209. emit(JNZ);
  210. emit32(prologueSize - codePos - 4);
  211. emitByte(JMP);
  212. emit32(epilogueOffset - codePos - 4);
  213. emitByte(0x90);
  214. }
  215. void JitCompilerX86::generateCode(Instruction& instr) {
  216. auto generator = engine[instr.opcode];
  217. (this->*generator)(instr);
  218. }
  219. void JitCompilerX86::genAddressReg(Instruction& instr, bool rax = true) {
  220. emit(REX_MOV_RR);
  221. emitByte((rax ? 0xc0 : 0xc8) + instr.src);
  222. if (rax)
  223. emitByte(AND_EAX_I);
  224. else
  225. emit(AND_ECX_I);
  226. emit32((instr.mod % 4) ? ScratchpadL1Mask : ScratchpadL2Mask);
  227. }
  228. void JitCompilerX86::genAddressRegDst(Instruction& instr, bool align16 = false) {
  229. emit(REX_MOV_RR);
  230. emitByte(0xc0 + instr.dst);
  231. emitByte(AND_EAX_I);
  232. int32_t maskL1 = align16 ? ScratchpadL1Mask16 : ScratchpadL1Mask;
  233. int32_t maskL2 = align16 ? ScratchpadL2Mask16 : ScratchpadL2Mask;
  234. emit32((instr.mod % 4) ? maskL1 : maskL2);
  235. }
  236. void JitCompilerX86::genAddressImm(Instruction& instr) {
  237. emit32(instr.imm32 & ScratchpadL3Mask);
  238. }
  239. void JitCompilerX86::h_IADD_R(Instruction& instr) {
  240. if (instr.src != instr.dst) {
  241. emit(REX_ADD_RR);
  242. emitByte(0xc0 + 8 * instr.dst + instr.src);
  243. }
  244. else {
  245. emit(REX_81);
  246. emitByte(0xc0 + instr.dst);
  247. emit32(instr.imm32);
  248. }
  249. }
  250. void JitCompilerX86::h_IADD_M(Instruction& instr) {
  251. if (instr.src != instr.dst) {
  252. genAddressReg(instr);
  253. emit(REX_ADD_RM);
  254. emitByte(0x04 + 8 * instr.dst);
  255. emitByte(0x06);
  256. }
  257. else {
  258. emit(REX_ADD_RM);
  259. emitByte(0x86 + 8 * instr.dst);
  260. genAddressImm(instr);
  261. }
  262. }
  263. void JitCompilerX86::genSIB(int scale, int index, int base) {
  264. emitByte((scale << 5) | (index << 3) | base);
  265. }
  266. void JitCompilerX86::h_IADD_RC(Instruction& instr) {
  267. emit(REX_LEA);
  268. emitByte(0x84 + 8 * instr.dst);
  269. genSIB(0, instr.src, instr.dst);
  270. emit32(instr.imm32);
  271. }
  272. void JitCompilerX86::h_ISUB_R(Instruction& instr) {
  273. if (instr.src != instr.dst) {
  274. emit(REX_SUB_RR);
  275. emitByte(0xc0 + 8 * instr.dst + instr.src);
  276. }
  277. else {
  278. emit(REX_81);
  279. emitByte(0xe8 + instr.dst);
  280. genAddressImm(instr);
  281. }
  282. }
  283. void JitCompilerX86::h_ISUB_M(Instruction& instr) {
  284. if (instr.src != instr.dst) {
  285. genAddressReg(instr);
  286. emit(REX_SUB_RM);
  287. emitByte(0x04 + 8 * instr.dst);
  288. emitByte(0x06);
  289. }
  290. else {
  291. emit(REX_SUB_RM);
  292. emitByte(0x86 + 8 * instr.dst);
  293. genAddressImm(instr);
  294. }
  295. }
  296. void JitCompilerX86::h_IMUL_9C(Instruction& instr) {
  297. emit(REX_LEA);
  298. emitByte(0x84 + 8 * instr.dst);
  299. genSIB(3, instr.src, instr.dst);
  300. emit32(instr.imm32);
  301. }
  302. void JitCompilerX86::h_IMUL_R(Instruction& instr) {
  303. if (instr.src != instr.dst) {
  304. emit(REX_IMUL_RR);
  305. emitByte(0xc0 + 8 * instr.dst + instr.src);
  306. }
  307. else {
  308. emit(REX_IMUL_RRI);
  309. emitByte(0xc0 + 9 * instr.dst);
  310. genAddressImm(instr);
  311. }
  312. }
  313. void JitCompilerX86::h_IMUL_M(Instruction& instr) {
  314. if (instr.src != instr.dst) {
  315. genAddressReg(instr);
  316. emit(REX_IMUL_RM);
  317. emitByte(0x04 + 8 * instr.dst);
  318. emitByte(0x06);
  319. }
  320. else {
  321. emit(REX_IMUL_RM);
  322. emitByte(0x86 + 8 * instr.dst);
  323. genAddressImm(instr);
  324. }
  325. }
  326. void JitCompilerX86::h_IMULH_R(Instruction& instr) {
  327. emit(REX_MOV_RR64);
  328. emitByte(0xc0 + instr.dst);
  329. emit(REX_MUL_R);
  330. emitByte(0xe0 + instr.src);
  331. emit(REX_MOV_R64R);
  332. emitByte(0xc2 + 8 * instr.dst);
  333. }
  334. void JitCompilerX86::h_IMULH_M(Instruction& instr) {
  335. if (instr.src != instr.dst) {
  336. genAddressReg(instr, false);
  337. emit(REX_MOV_RR64);
  338. emitByte(0xc0 + instr.dst);
  339. emit(REX_MUL_MEM);
  340. }
  341. else {
  342. emit(REX_MOV_RR64);
  343. emitByte(0xc0 + instr.dst);
  344. emit(REX_MUL_M);
  345. emitByte(0xa6);
  346. genAddressImm(instr);
  347. }
  348. emit(REX_MOV_R64R);
  349. emitByte(0xc2 + 8 * instr.dst);
  350. }
  351. void JitCompilerX86::h_ISMULH_R(Instruction& instr) {
  352. emit(REX_MOV_RR64);
  353. emitByte(0xc0 + instr.dst);
  354. emit(REX_MUL_R);
  355. emitByte(0xe8 + instr.src);
  356. emit(REX_MOV_R64R);
  357. emitByte(0xc2 + 8 * instr.dst);
  358. }
  359. void JitCompilerX86::h_ISMULH_M(Instruction& instr) {
  360. if (instr.src != instr.dst) {
  361. genAddressReg(instr, false);
  362. emit(REX_MOV_RR64);
  363. emitByte(0xc0 + instr.dst);
  364. emit(REX_IMUL_MEM);
  365. }
  366. else {
  367. emit(REX_MOV_RR64);
  368. emitByte(0xc0 + instr.dst);
  369. emit(REX_MUL_M);
  370. emitByte(0xae);
  371. genAddressImm(instr);
  372. }
  373. emit(REX_MOV_R64R);
  374. emitByte(0xc2 + 8 * instr.dst);
  375. }
  376. void JitCompilerX86::h_IDIV_C(Instruction& instr) {
  377. if (instr.imm32 != 0) {
  378. uint32_t divisor = instr.imm32;
  379. if (divisor & (divisor - 1)) {
  380. magicu_info mi = compute_unsigned_magic_info(divisor, sizeof(uint64_t) * 8);
  381. if (mi.pre_shift == 0 && !mi.increment) {
  382. emit(MOV_RAX_I);
  383. emit64(mi.multiplier);
  384. emit(REX_MUL_R);
  385. emitByte(0xe0 + instr.dst);
  386. }
  387. else {
  388. emit(REX_MOV_RR64);
  389. emitByte(0xc0 + instr.dst);
  390. if (mi.pre_shift > 0) {
  391. emit(REX_SHR_RAX);
  392. emitByte(mi.pre_shift);
  393. }
  394. if (mi.increment) {
  395. emit(RAX_ADD_SBB_1);
  396. }
  397. emit(MOV_RCX_I);
  398. emit64(mi.multiplier);
  399. emit(MUL_RCX);
  400. }
  401. if (mi.post_shift > 0) {
  402. emit(REX_SHR_RDX);
  403. emitByte(mi.post_shift);
  404. }
  405. emit(REX_ADD_RR);
  406. emitByte(0xc2 + 8 * instr.dst);
  407. }
  408. else { //divisor is a power of two
  409. int shift = 0;
  410. while (divisor >>= 1)
  411. ++shift;
  412. if (shift > 0) {
  413. emit(REX_SH);
  414. emitByte(0xe8 + instr.dst);
  415. }
  416. }
  417. }
  418. }
  419. void JitCompilerX86::h_ISDIV_C(Instruction& instr) {
  420. int64_t divisor = instr.imm32;
  421. if ((divisor & -divisor) == divisor || (divisor & -divisor) == -divisor) {
  422. emit(REX_MOV_RR64);
  423. emitByte(0xc0 + instr.dst);
  424. // +/- power of two
  425. bool negative = divisor < 0;
  426. if (negative)
  427. divisor = -divisor;
  428. int shift = 0;
  429. uint64_t unsignedDivisor = divisor;
  430. while (unsignedDivisor >>= 1)
  431. ++shift;
  432. if (shift > 0) {
  433. emit(MOV_RCX_RAX_SAR_RCX_63);
  434. uint32_t mask = (1ULL << shift) - 1;
  435. emit(AND_ECX_I);
  436. emit32(mask);
  437. emit(ADD_RAX_RCX);
  438. emit(SAR_RAX_I8);
  439. emitByte(shift);
  440. }
  441. if (negative)
  442. emit(NEG_RAX);
  443. emit(ADD_R_RAX);
  444. emitByte(0xc0 + instr.dst);
  445. }
  446. else if (divisor != 0) {
  447. magics_info mi = compute_signed_magic_info(divisor);
  448. emit(MOV_RAX_I);
  449. emit64(mi.multiplier);
  450. emit(REX_MUL_R);
  451. emitByte(0xe8 + instr.dst);
  452. emit(XOR_EAX_EAX);
  453. bool haveSF = false;
  454. if (divisor > 0 && mi.multiplier < 0) {
  455. emit(ADD_RDX_R);
  456. emitByte(0xc2 + 8 * instr.dst);
  457. haveSF = true;
  458. }
  459. if (divisor < 0 && mi.multiplier > 0) {
  460. emit(SUB_RDX_R);
  461. emitByte(0xc2 + 8 * instr.dst);
  462. haveSF = true;
  463. }
  464. if (mi.shift > 0) {
  465. emit(SAR_RDX_I8);
  466. emitByte(mi.shift);
  467. haveSF = true;
  468. }
  469. if (!haveSF)
  470. emit(TEST_RDX_RDX);
  471. emit(SETS_AL_ADD_RDX_RAX);
  472. emit(ADD_R_RAX);
  473. emitByte(0xd0 + instr.dst);
  474. }
  475. }
  476. void JitCompilerX86::h_INEG_R(Instruction& instr) {
  477. emit(REX_NEG);
  478. emitByte(0xd8 + instr.dst);
  479. }
  480. void JitCompilerX86::h_IXOR_R(Instruction& instr) {
  481. if (instr.src != instr.dst) {
  482. emit(REX_XOR_RR);
  483. emitByte(0xc0 + 8 * instr.dst + instr.src);
  484. }
  485. else {
  486. emit(REX_XOR_RI);
  487. emitByte(0xf0 + instr.dst);
  488. emit32(instr.imm32);
  489. }
  490. }
  491. void JitCompilerX86::h_IXOR_M(Instruction& instr) {
  492. if (instr.src != instr.dst) {
  493. genAddressReg(instr);
  494. emit(REX_XOR_RM);
  495. emitByte(0x04 + 8 * instr.dst);
  496. emitByte(0x06);
  497. }
  498. else {
  499. emit(REX_XOR_RM);
  500. emitByte(0x86 + 8 * instr.dst);
  501. genAddressImm(instr);
  502. }
  503. }
  504. void JitCompilerX86::h_IROR_R(Instruction& instr) {
  505. if (instr.src != instr.dst) {
  506. emit(REX_MOV_RR);
  507. emitByte(0xc8 + instr.src);
  508. emit(REX_ROT_CL);
  509. emitByte(0xc8 + instr.dst);
  510. }
  511. else {
  512. emit(REX_ROT_I8);
  513. emitByte(0xc8 + instr.dst);
  514. emitByte(instr.imm32 & 63);
  515. }
  516. }
  517. void JitCompilerX86::h_IROL_R(Instruction& instr) {
  518. if (instr.src != instr.dst) {
  519. emit(REX_MOV_RR);
  520. emitByte(0xc8 + instr.src);
  521. emit(REX_ROT_CL);
  522. emitByte(0xc0 + instr.dst);
  523. }
  524. else {
  525. emit(REX_ROT_I8);
  526. emitByte(0xc0 + instr.dst);
  527. emitByte(instr.imm32 & 63);
  528. }
  529. }
  530. void JitCompilerX86::h_ISWAP_R(Instruction& instr) {
  531. if (instr.src != instr.dst) {
  532. emit(REX_XCHG);
  533. emitByte(0xc0 + instr.dst + 8 * instr.src);
  534. }
  535. }
  536. void JitCompilerX86::h_FSWAP_R(Instruction& instr) {
  537. emit(SHUFPD);
  538. emitByte(0xc0 + 9 * instr.dst);
  539. emitByte(1);
  540. }
  541. void JitCompilerX86::h_FADD_R(Instruction& instr) {
  542. instr.dst %= 4;
  543. instr.src %= 4;
  544. emit(REX_ADDPD);
  545. emitByte(0xc0 + instr.src + 8 * instr.dst);
  546. //emit(REX_PADD);
  547. //emitByte(PADD_OPCODES[instr.mod % 4]);
  548. //emitByte(0xf8 + instr.dst);
  549. }
  550. void JitCompilerX86::h_FADD_M(Instruction& instr) {
  551. instr.dst %= 4;
  552. genAddressReg(instr);
  553. emit(REX_CVTDQ2PD_XMM12);
  554. emit(REX_ADDPD);
  555. emitByte(0xc4 + 8 * instr.dst);
  556. }
  557. void JitCompilerX86::h_FSUB_R(Instruction& instr) {
  558. instr.dst %= 4;
  559. instr.src %= 4;
  560. emit(REX_SUBPD);
  561. emitByte(0xc0 + instr.src + 8 * instr.dst);
  562. //emit(REX_PADD);
  563. //emitByte(PADD_OPCODES[instr.mod % 4]);
  564. //emitByte(0xf8 + instr.dst);
  565. }
  566. void JitCompilerX86::h_FSUB_M(Instruction& instr) {
  567. instr.dst %= 4;
  568. genAddressReg(instr);
  569. emit(REX_CVTDQ2PD_XMM12);
  570. emit(REX_SUBPD);
  571. emitByte(0xc4 + 8 * instr.dst);
  572. }
  573. void JitCompilerX86::h_FNEG_R(Instruction& instr) {
  574. instr.dst %= 4;
  575. emit(REX_XORPS);
  576. emitByte(0xc7 + 8 * instr.dst);
  577. }
  578. void JitCompilerX86::h_FMUL_R(Instruction& instr) {
  579. instr.dst %= 4;
  580. instr.src %= 4;
  581. emit(REX_MULPD);
  582. emitByte(0xe0 + instr.src + 8 * instr.dst);
  583. }
  584. void JitCompilerX86::h_FMUL_M(Instruction& instr) {
  585. instr.dst %= 4;
  586. genAddressReg(instr);
  587. emit(REX_CVTDQ2PD_XMM12);
  588. emit(REX_ANDPS_XMM12);
  589. emit(REX_MULPD);
  590. emitByte(0xe4 + 8 * instr.dst);
  591. emit(REX_MAXPD);
  592. emitByte(0xe5 + 8 * instr.dst);
  593. }
  594. void JitCompilerX86::h_FDIV_R(Instruction& instr) {
  595. instr.dst %= 4;
  596. instr.src %= 4;
  597. emit(REX_DIVPD);
  598. emitByte(0xe0 + instr.src + 8 * instr.dst);
  599. emit(REX_MAXPD);
  600. emitByte(0xe5 + 8 * instr.dst);
  601. }
  602. void JitCompilerX86::h_FDIV_M(Instruction& instr) {
  603. instr.dst %= 4;
  604. genAddressReg(instr);
  605. emit(REX_CVTDQ2PD_XMM12);
  606. emit(REX_ANDPS_XMM12);
  607. emit(REX_DIVPD);
  608. emitByte(0xe4 + 8 * instr.dst);
  609. emit(REX_MAXPD);
  610. emitByte(0xe5 + 8 * instr.dst);
  611. }
  612. void JitCompilerX86::h_FSQRT_R(Instruction& instr) {
  613. instr.dst %= 4;
  614. emit(SQRTPD);
  615. emitByte(0xe4 + 9 * instr.dst);
  616. }
  617. void JitCompilerX86::h_CFROUND(Instruction& instr) {
  618. emit(REX_MOV_RR64);
  619. emitByte(0xc0 + instr.src);
  620. int rotate = (13 - (instr.imm32 & 63)) & 63;
  621. if (rotate != 0) {
  622. emit(ROL_RAX);
  623. emitByte(rotate);
  624. }
  625. emit(AND_OR_MOV_LDMXCSR);
  626. }
  627. static inline uint8_t condition(Instruction& instr, bool invert = false) {
  628. switch ((instr.mod & 7) ^ invert)
  629. {
  630. case 0:
  631. return 0x96; //setbe
  632. case 1:
  633. return 0x97; //seta
  634. case 2:
  635. return 0x98; //sets
  636. case 3:
  637. return 0x99; //setns
  638. case 4:
  639. return 0x90; //seto
  640. case 5:
  641. return 0x91; //setno
  642. case 6:
  643. return 0x9c; //setl
  644. case 7:
  645. return 0x9d; //setge
  646. }
  647. }
  648. void JitCompilerX86::h_COND_R(Instruction& instr) {
  649. emit(XOR_ECX_ECX);
  650. emit(REX_CMP_R32I);
  651. emitByte(0xf8 + instr.src);
  652. emit32(instr.imm32);
  653. emitByte(0x0f);
  654. emitByte(condition(instr));
  655. emitByte(0xc1);
  656. emit(REX_ADD_RM);
  657. emitByte(0xc1 + 8 * instr.dst);
  658. }
  659. void JitCompilerX86::h_COND_M(Instruction& instr) {
  660. emit(XOR_ECX_ECX);
  661. genAddressReg(instr);
  662. emit(REX_CMP_M32I);
  663. emit32(instr.imm32);
  664. emitByte(0x0f);
  665. emitByte(condition(instr));
  666. emitByte(0xc1);
  667. emit(REX_ADD_RM);
  668. emitByte(0xc1 + 8 * instr.dst);
  669. }
  670. void JitCompilerX86::h_ISTORE(Instruction& instr) {
  671. genAddressRegDst(instr);
  672. emit(REX_MOV_MR);
  673. emitByte(0x04 + 8 * instr.src);
  674. emitByte(0x06);
  675. }
  676. void JitCompilerX86::h_FSTORE(Instruction& instr) {
  677. genAddressRegDst(instr, true);
  678. emit(MOVAPD);
  679. emitByte(0x04 + 8 * instr.src);
  680. emitByte(0x06);
  681. }
  682. void JitCompilerX86::h_NOP(Instruction& instr) {
  683. emitByte(0x90);
  684. }
  685. #include "instructionWeights.hpp"
  686. #define INST_HANDLE(x) REPN(&JitCompilerX86::h_##x, WT(x))
  687. InstructionGeneratorX86 JitCompilerX86::engine[256] = {
  688. INST_HANDLE(IADD_R)
  689. INST_HANDLE(IADD_M)
  690. INST_HANDLE(IADD_RC)
  691. INST_HANDLE(ISUB_R)
  692. INST_HANDLE(ISUB_M)
  693. INST_HANDLE(IMUL_9C)
  694. INST_HANDLE(IMUL_R)
  695. INST_HANDLE(IMUL_M)
  696. INST_HANDLE(IMULH_R)
  697. INST_HANDLE(IMULH_M)
  698. INST_HANDLE(ISMULH_R)
  699. INST_HANDLE(ISMULH_M)
  700. INST_HANDLE(IDIV_C)
  701. INST_HANDLE(ISDIV_C)
  702. INST_HANDLE(INEG_R)
  703. INST_HANDLE(IXOR_R)
  704. INST_HANDLE(IXOR_M)
  705. INST_HANDLE(IROR_R)
  706. INST_HANDLE(IROL_R)
  707. INST_HANDLE(ISWAP_R)
  708. INST_HANDLE(FSWAP_R)
  709. INST_HANDLE(FADD_R)
  710. INST_HANDLE(FADD_M)
  711. INST_HANDLE(FSUB_R)
  712. INST_HANDLE(FSUB_M)
  713. INST_HANDLE(FNEG_R)
  714. INST_HANDLE(FMUL_R)
  715. INST_HANDLE(FMUL_M)
  716. INST_HANDLE(FDIV_R)
  717. INST_HANDLE(FDIV_M)
  718. INST_HANDLE(FSQRT_R)
  719. INST_HANDLE(COND_R)
  720. INST_HANDLE(COND_M)
  721. INST_HANDLE(CFROUND)
  722. INST_HANDLE(ISTORE)
  723. INST_HANDLE(FSTORE)
  724. INST_HANDLE(NOP)
  725. };
  726. #endif
  727. }