intrin_portable.h 15 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598
  1. /*
  2. Copyright (c) 2018-2019, tevador <tevador@gmail.com>
  3. All rights reserved.
  4. Redistribution and use in source and binary forms, with or without
  5. modification, are permitted provided that the following conditions are met:
  6. * Redistributions of source code must retain the above copyright
  7. notice, this list of conditions and the following disclaimer.
  8. * Redistributions in binary form must reproduce the above copyright
  9. notice, this list of conditions and the following disclaimer in the
  10. documentation and/or other materials provided with the distribution.
  11. * Neither the name of the copyright holder nor the
  12. names of its contributors may be used to endorse or promote products
  13. derived from this software without specific prior written permission.
  14. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
  15. ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  16. WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  17. DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
  18. FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  19. DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  20. SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  21. CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  22. OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  23. OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  24. */
  25. #pragma once
  26. #include <cstdint>
  27. #include "blake2/endian.h"
  28. constexpr int32_t unsigned32ToSigned2sCompl(uint32_t x) {
  29. return (-1 == ~0) ? (int32_t)x : (x > INT32_MAX ? (-(int32_t)(UINT32_MAX - x) - 1) : (int32_t)x);
  30. }
  31. constexpr int64_t unsigned64ToSigned2sCompl(uint64_t x) {
  32. return (-1 == ~0) ? (int64_t)x : (x > INT64_MAX ? (-(int64_t)(UINT64_MAX - x) - 1) : (int64_t)x);
  33. }
  34. constexpr uint64_t signExtend2sCompl(uint32_t x) {
  35. return (-1 == ~0) ? (int64_t)(int32_t)(x) : (x > INT32_MAX ? (x | 0xffffffff00000000ULL) : (uint64_t)x);
  36. }
  37. constexpr int RoundToNearest = 0;
  38. constexpr int RoundDown = 1;
  39. constexpr int RoundUp = 2;
  40. constexpr int RoundToZero = 3;
  41. //MSVC doesn't define __SSE2__, so we have to define it manually if SSE2 is available
  42. #if !defined(__SSE2__) && (defined(_M_X64) || (defined(_M_IX86_FP) && _M_IX86_FP == 2))
  43. #define __SSE2__ 1
  44. #endif
  45. //the library "sqrt" function provided by MSVC for x86 targets doesn't give
  46. //the correct results, so we have to use inline assembly to call x87 fsqrt directly
  47. #if !defined(__SSE2__)
  48. #if defined(_M_IX86)
  49. inline double __cdecl rx_sqrt(double x) {
  50. __asm {
  51. fld x
  52. fsqrt
  53. }
  54. }
  55. #define rx_sqrt rx_sqrt
  56. void rx_set_double_precision();
  57. #define RANDOMX_USE_X87
  58. #elif defined(__i386)
  59. void rx_set_double_precision();
  60. #define RANDOMX_USE_X87
  61. #endif
  62. #endif //__SSE2__
  63. #if !defined(rx_sqrt)
  64. #define rx_sqrt sqrt
  65. #endif
  66. #if !defined(RANDOMX_USE_X87)
  67. #define rx_set_double_precision(x)
  68. #endif
  69. #ifdef __SSE2__
  70. #ifdef __GNUC__
  71. #include <x86intrin.h>
  72. #else
  73. #include <intrin.h>
  74. #endif
  75. typedef __m128i rx_vec_i128;
  76. typedef __m128d rx_vec_f128;
  77. #define rx_aligned_alloc(a, b) _mm_malloc(a,b)
  78. #define rx_aligned_free(a) _mm_free(a)
  79. #define rx_prefetch_nta(x) _mm_prefetch((const char *)(x), _MM_HINT_NTA)
  80. #define rx_load_vec_f128 _mm_load_pd
  81. #define rx_store_vec_f128 _mm_store_pd
  82. #define rx_add_vec_f128 _mm_add_pd
  83. #define rx_sub_vec_f128 _mm_sub_pd
  84. #define rx_mul_vec_f128 _mm_mul_pd
  85. #define rx_div_vec_f128 _mm_div_pd
  86. #define rx_sqrt_vec_f128 _mm_sqrt_pd
  87. FORCE_INLINE rx_vec_f128 rx_swap_vec_f128(rx_vec_f128 a) {
  88. return _mm_shuffle_pd(a, a, 1);
  89. }
  90. FORCE_INLINE rx_vec_f128 rx_set_vec_f128(uint64_t x1, uint64_t x0) {
  91. return _mm_castsi128_pd(_mm_set_epi64x(x1, x0));
  92. }
  93. FORCE_INLINE rx_vec_f128 rx_set1_vec_f128(uint64_t x) {
  94. return _mm_castsi128_pd(_mm_set1_epi64x(x));
  95. }
  96. #define rx_xor_vec_f128 _mm_xor_pd
  97. #define rx_and_vec_f128 _mm_and_pd
  98. #define rx_or_vec_f128 _mm_or_pd
  99. #define rx_aesenc_vec_i128 _mm_aesenc_si128
  100. #define rx_aesdec_vec_i128 _mm_aesdec_si128
  101. FORCE_INLINE int rx_vec_i128_x(rx_vec_i128 a) {
  102. return _mm_cvtsi128_si32(a);
  103. }
  104. FORCE_INLINE int rx_vec_i128_y(rx_vec_i128 a) {
  105. return _mm_cvtsi128_si32(_mm_shuffle_epi32(a, 0x55));
  106. }
  107. FORCE_INLINE int rx_vec_i128_z(rx_vec_i128 a) {
  108. return _mm_cvtsi128_si32(_mm_shuffle_epi32(a, 0xaa));
  109. }
  110. FORCE_INLINE int rx_vec_i128_w(rx_vec_i128 a) {
  111. return _mm_cvtsi128_si32(_mm_shuffle_epi32(a, 0xff));
  112. }
  113. #define rx_set_int_vec_i128 _mm_set_epi32
  114. #define rx_xor_vec_i128 _mm_xor_si128
  115. #define rx_load_vec_i128 _mm_load_si128
  116. #define rx_store_vec_i128 _mm_store_si128
  117. FORCE_INLINE rx_vec_f128 rx_cvt_packed_int_vec_f128(const void* addr) {
  118. __m128i ix = _mm_loadl_epi64((const __m128i*)addr);
  119. return _mm_cvtepi32_pd(ix);
  120. }
  121. constexpr uint32_t rx_mxcsr_default = 0x9FC0; //Flush to zero, denormals are zero, default rounding mode, all exceptions disabled
  122. FORCE_INLINE void rx_reset_float_state() {
  123. _mm_setcsr(rx_mxcsr_default);
  124. }
  125. FORCE_INLINE void rx_set_rounding_mode(uint32_t mode) {
  126. _mm_setcsr(rx_mxcsr_default | (mode << 13));
  127. }
  128. #elif defined(__PPC64__) && defined(__ALTIVEC__) && defined(__VSX__) //sadly only POWER7 and newer will be able to use SIMD acceleration. Earlier processors cant use doubles or 64 bit integers with SIMD
  129. #include <cstdint>
  130. #include <stdexcept>
  131. #include <cstdlib>
  132. #include<altivec.h>
  133. #undef vector
  134. #undef pixel
  135. #undef bool
  136. typedef __vector uint8_t __m128i;
  137. typedef __vector uint32_t __m128l;
  138. typedef __vector int __m128li;
  139. typedef __vector uint64_t __m128ll;
  140. typedef __vector double __m128d;
  141. typedef __m128i rx_vec_i128;
  142. typedef __m128d rx_vec_f128;
  143. typedef union{
  144. rx_vec_i128 i;
  145. rx_vec_f128 d;
  146. uint64_t u64[2];
  147. double d64[2];
  148. uint32_t u32[4];
  149. int i32[4];
  150. } vec_u;
  151. #define rx_aligned_alloc(a, b) malloc(a)
  152. #define rx_aligned_free(a) free(a)
  153. #define rx_prefetch_nta(x)
  154. /* Splat 64-bit long long to 2 64-bit long longs */
  155. FORCE_INLINE __m128i vec_splat2sd (int64_t scalar)
  156. { return (__m128i) vec_splats (scalar); }
  157. FORCE_INLINE rx_vec_f128 rx_load_vec_f128(const double* pd) {
  158. #if defined(NATIVE_LITTLE_ENDIAN)
  159. return (rx_vec_f128)vec_vsx_ld(0,pd);
  160. #else
  161. vec_u t;
  162. t.u64[0] = load64(pd + 0);
  163. t.u64[1] = load64(pd + 1);
  164. return (rx_vec_f128)t.d;
  165. #endif
  166. }
  167. FORCE_INLINE void rx_store_vec_f128(double* mem_addr, rx_vec_f128 a) {
  168. #if defined(NATIVE_LITTLE_ENDIAN)
  169. vec_vsx_st(a,0,(rx_vec_f128*)mem_addr);
  170. #else
  171. vec_u _a;
  172. _a.d = a;
  173. store64(mem_addr + 0, _a.u64[0]);
  174. store64(mem_addr + 1, _a.u64[1]);
  175. #endif
  176. }
  177. FORCE_INLINE rx_vec_f128 rx_swap_vec_f128(rx_vec_f128 a) {
  178. return (rx_vec_f128)vec_perm((__m128i)a,(__m128i)a,(__m128i){8,9,10,11,12,13,14,15,0,1,2,3,4,5,6,7});
  179. }
  180. FORCE_INLINE rx_vec_f128 rx_add_vec_f128(rx_vec_f128 a, rx_vec_f128 b) {
  181. return (rx_vec_f128)vec_add(a,b);
  182. }
  183. FORCE_INLINE rx_vec_f128 rx_sub_vec_f128(rx_vec_f128 a, rx_vec_f128 b) {
  184. return (rx_vec_f128)vec_sub(a,b);
  185. }
  186. FORCE_INLINE rx_vec_f128 rx_mul_vec_f128(rx_vec_f128 a, rx_vec_f128 b) {
  187. return (rx_vec_f128)vec_mul(a,b);
  188. }
  189. FORCE_INLINE rx_vec_f128 rx_div_vec_f128(rx_vec_f128 a, rx_vec_f128 b) {
  190. return (rx_vec_f128)vec_div(a,b);
  191. }
  192. FORCE_INLINE rx_vec_f128 rx_sqrt_vec_f128(rx_vec_f128 a) {
  193. return (rx_vec_f128)vec_sqrt(a);
  194. }
  195. FORCE_INLINE rx_vec_i128 rx_set1_long_vec_i128(uint64_t a) {
  196. return (rx_vec_i128)vec_splat2sd(a);
  197. }
  198. FORCE_INLINE rx_vec_f128 rx_vec_i128_vec_f128(rx_vec_i128 a) {
  199. return (rx_vec_f128)a;
  200. }
  201. FORCE_INLINE rx_vec_f128 rx_set_vec_f128(uint64_t x1, uint64_t x0) {
  202. return (rx_vec_f128)(__m128ll){x0,x1};
  203. }
  204. FORCE_INLINE rx_vec_f128 rx_set1_vec_f128(uint64_t x) {
  205. return (rx_vec_f128)vec_splat2sd(x);
  206. }
  207. FORCE_INLINE rx_vec_f128 rx_xor_vec_f128(rx_vec_f128 a, rx_vec_f128 b) {
  208. return (rx_vec_f128)vec_xor(a,b);
  209. }
  210. FORCE_INLINE rx_vec_f128 rx_and_vec_f128(rx_vec_f128 a, rx_vec_f128 b) {
  211. return (rx_vec_f128)vec_and(a,b);
  212. }
  213. FORCE_INLINE rx_vec_f128 rx_or_vec_f128(rx_vec_f128 a, rx_vec_f128 b) {
  214. return (rx_vec_f128)vec_or(a,b);
  215. }
  216. #if defined(__CRYPTO__)
  217. FORCE_INLINE __m128ll vrev(__m128i v){
  218. #if defined(NATIVE_LITTLE_ENDIAN)
  219. return (__m128ll)vec_perm((__m128i)v,(__m128i){0},(__m128i){15,14,13,12,11,10,9,8,7,6,5,4,3,2,1,0});
  220. #else
  221. return (__m128ll)vec_perm((__m128i)v,(__m128i){0},(__m128i){3,2,1,0, 7,6,5,4, 11,10,9,8, 15,14,13,12});
  222. #endif
  223. }
  224. FORCE_INLINE rx_vec_i128 rx_aesenc_vec_i128(rx_vec_i128 v, rx_vec_i128 rkey) {
  225. __m128ll _v = vrev(v);
  226. __m128ll _rkey = vrev(rkey);
  227. __m128ll result = vrev((__m128i)__builtin_crypto_vcipher(_v,_rkey));
  228. return (rx_vec_i128)result;
  229. }
  230. FORCE_INLINE rx_vec_i128 rx_aesdec_vec_i128(rx_vec_i128 v, rx_vec_i128 rkey) {
  231. __m128ll _v = vrev(v);
  232. __m128ll zero = (__m128ll){0};
  233. __m128ll out = vrev((__m128i)__builtin_crypto_vncipher(_v,zero));
  234. return (rx_vec_i128)vec_xor((__m128i)out,rkey);
  235. }
  236. #else
  237. static const char* platformError = "Platform doesn't support hardware AES";
  238. FORCE_INLINE rx_vec_i128 rx_aesenc_vec_i128(rx_vec_i128 v, rx_vec_i128 rkey) {
  239. throw std::runtime_error(platformError);
  240. }
  241. FORCE_INLINE rx_vec_i128 rx_aesdec_vec_i128(rx_vec_i128 v, rx_vec_i128 rkey) {
  242. throw std::runtime_error(platformError);
  243. }
  244. #endif
  245. FORCE_INLINE int rx_vec_i128_x(rx_vec_i128 a) {
  246. vec_u _a;
  247. _a.i = a;
  248. return _a.i32[0];
  249. }
  250. FORCE_INLINE int rx_vec_i128_y(rx_vec_i128 a) {
  251. vec_u _a;
  252. _a.i = a;
  253. return _a.i32[1];
  254. }
  255. FORCE_INLINE int rx_vec_i128_z(rx_vec_i128 a) {
  256. vec_u _a;
  257. _a.i = a;
  258. return _a.i32[2];
  259. }
  260. FORCE_INLINE int rx_vec_i128_w(rx_vec_i128 a) {
  261. vec_u _a;
  262. _a.i = a;
  263. return _a.i32[3];
  264. }
  265. FORCE_INLINE rx_vec_i128 rx_set_int_vec_i128(int _I3, int _I2, int _I1, int _I0) {
  266. return (rx_vec_i128)((__m128li){_I0,_I1,_I2,_I3});
  267. };
  268. FORCE_INLINE rx_vec_i128 rx_xor_vec_i128(rx_vec_i128 _A, rx_vec_i128 _B) {
  269. return (rx_vec_i128)vec_xor(_A,_B);
  270. }
  271. FORCE_INLINE rx_vec_i128 rx_load_vec_i128(rx_vec_i128 const *_P) {
  272. #if defined(NATIVE_LITTLE_ENDIAN)
  273. return *_P;
  274. #else
  275. uint32_t* ptr = (uint32_t*)_P;
  276. vec_u c;
  277. c.u32[0] = load32(ptr + 0);
  278. c.u32[1] = load32(ptr + 1);
  279. c.u32[2] = load32(ptr + 2);
  280. c.u32[3] = load32(ptr + 3);
  281. return (rx_vec_i128)c.i;
  282. #endif
  283. }
  284. FORCE_INLINE void rx_store_vec_i128(rx_vec_i128 *_P, rx_vec_i128 _B) {
  285. #if defined(NATIVE_LITTLE_ENDIAN)
  286. *_P = _B;
  287. #else
  288. uint32_t* ptr = (uint32_t*)_P;
  289. vec_u B;
  290. B.i = _B;
  291. store32(ptr + 0, B.u32[0]);
  292. store32(ptr + 1, B.u32[1]);
  293. store32(ptr + 2, B.u32[2]);
  294. store32(ptr + 3, B.u32[3]);
  295. #endif
  296. }
  297. FORCE_INLINE rx_vec_f128 rx_cvt_packed_int_vec_f128(const void* addr) {
  298. vec_u x;
  299. x.d64[0] = (double)unsigned32ToSigned2sCompl(load32((uint8_t*)addr + 0));
  300. x.d64[1] = (double)unsigned32ToSigned2sCompl(load32((uint8_t*)addr + 4));
  301. return (rx_vec_f128)x.d;
  302. }
  303. #define RANDOMX_DEFAULT_FENV
  304. void rx_reset_float_state();
  305. void rx_set_rounding_mode(uint32_t mode);
  306. #else //end altivec
  307. #include <cstdint>
  308. #include <stdexcept>
  309. #include <cstdlib>
  310. #include <cmath>
  311. typedef union {
  312. uint64_t u64[2];
  313. uint32_t u32[4];
  314. uint16_t u16[8];
  315. uint8_t u8[16];
  316. } rx_vec_i128;
  317. typedef union {
  318. struct {
  319. double lo;
  320. double hi;
  321. };
  322. rx_vec_i128 i;
  323. } rx_vec_f128;
  324. #define rx_aligned_alloc(a, b) malloc(a)
  325. #define rx_aligned_free(a) free(a)
  326. #define rx_prefetch_nta(x)
  327. FORCE_INLINE rx_vec_f128 rx_load_vec_f128(const double* pd) {
  328. rx_vec_f128 x;
  329. x.i.u64[0] = load64(pd + 0);
  330. x.i.u64[1] = load64(pd + 1);
  331. return x;
  332. }
  333. FORCE_INLINE void rx_store_vec_f128(double* mem_addr, rx_vec_f128 a) {
  334. store64(mem_addr + 0, a.i.u64[0]);
  335. store64(mem_addr + 1, a.i.u64[1]);
  336. }
  337. FORCE_INLINE rx_vec_f128 rx_swap_vec_f128(rx_vec_f128 a) {
  338. double temp = a.hi;
  339. a.hi = a.lo;
  340. a.lo = temp;
  341. return a;
  342. }
  343. FORCE_INLINE rx_vec_f128 rx_add_vec_f128(rx_vec_f128 a, rx_vec_f128 b) {
  344. rx_vec_f128 x;
  345. x.lo = a.lo + b.lo;
  346. x.hi = a.hi + b.hi;
  347. return x;
  348. }
  349. FORCE_INLINE rx_vec_f128 rx_sub_vec_f128(rx_vec_f128 a, rx_vec_f128 b) {
  350. rx_vec_f128 x;
  351. x.lo = a.lo - b.lo;
  352. x.hi = a.hi - b.hi;
  353. return x;
  354. }
  355. FORCE_INLINE rx_vec_f128 rx_mul_vec_f128(rx_vec_f128 a, rx_vec_f128 b) {
  356. rx_vec_f128 x;
  357. x.lo = a.lo * b.lo;
  358. x.hi = a.hi * b.hi;
  359. return x;
  360. }
  361. FORCE_INLINE rx_vec_f128 rx_div_vec_f128(rx_vec_f128 a, rx_vec_f128 b) {
  362. rx_vec_f128 x;
  363. x.lo = a.lo / b.lo;
  364. x.hi = a.hi / b.hi;
  365. return x;
  366. }
  367. FORCE_INLINE rx_vec_f128 rx_sqrt_vec_f128(rx_vec_f128 a) {
  368. rx_vec_f128 x;
  369. x.lo = rx_sqrt(a.lo);
  370. x.hi = rx_sqrt(a.hi);
  371. return x;
  372. }
  373. FORCE_INLINE rx_vec_i128 rx_set1_long_vec_i128(uint64_t a) {
  374. rx_vec_i128 x;
  375. x.u64[0] = a;
  376. x.u64[1] = a;
  377. return x;
  378. }
  379. FORCE_INLINE rx_vec_f128 rx_vec_i128_vec_f128(rx_vec_i128 a) {
  380. rx_vec_f128 x;
  381. x.i = a;
  382. return x;
  383. }
  384. FORCE_INLINE rx_vec_f128 rx_set_vec_f128(uint64_t x1, uint64_t x0) {
  385. rx_vec_f128 v;
  386. v.i.u64[0] = x0;
  387. v.i.u64[1] = x1;
  388. return v;
  389. }
  390. FORCE_INLINE rx_vec_f128 rx_set1_vec_f128(uint64_t x) {
  391. rx_vec_f128 v;
  392. v.i.u64[0] = x;
  393. v.i.u64[1] = x;
  394. return v;
  395. }
  396. FORCE_INLINE rx_vec_f128 rx_xor_vec_f128(rx_vec_f128 a, rx_vec_f128 b) {
  397. rx_vec_f128 x;
  398. x.i.u64[0] = a.i.u64[0] ^ b.i.u64[0];
  399. x.i.u64[1] = a.i.u64[1] ^ b.i.u64[1];
  400. return x;
  401. }
  402. FORCE_INLINE rx_vec_f128 rx_and_vec_f128(rx_vec_f128 a, rx_vec_f128 b) {
  403. rx_vec_f128 x;
  404. x.i.u64[0] = a.i.u64[0] & b.i.u64[0];
  405. x.i.u64[1] = a.i.u64[1] & b.i.u64[1];
  406. return x;
  407. }
  408. FORCE_INLINE rx_vec_f128 rx_or_vec_f128(rx_vec_f128 a, rx_vec_f128 b) {
  409. rx_vec_f128 x;
  410. x.i.u64[0] = a.i.u64[0] | b.i.u64[0];
  411. x.i.u64[1] = a.i.u64[1] | b.i.u64[1];
  412. return x;
  413. }
  414. static const char* platformError = "Platform doesn't support hardware AES";
  415. FORCE_INLINE rx_vec_i128 rx_aesenc_vec_i128(rx_vec_i128 v, rx_vec_i128 rkey) {
  416. throw std::runtime_error(platformError);
  417. }
  418. FORCE_INLINE rx_vec_i128 rx_aesdec_vec_i128(rx_vec_i128 v, rx_vec_i128 rkey) {
  419. throw std::runtime_error(platformError);
  420. }
  421. FORCE_INLINE int rx_vec_i128_x(rx_vec_i128 a) {
  422. return a.u32[0];
  423. }
  424. FORCE_INLINE int rx_vec_i128_y(rx_vec_i128 a) {
  425. return a.u32[1];
  426. }
  427. FORCE_INLINE int rx_vec_i128_z(rx_vec_i128 a) {
  428. return a.u32[2];
  429. }
  430. FORCE_INLINE int rx_vec_i128_w(rx_vec_i128 a) {
  431. return a.u32[3];
  432. }
  433. FORCE_INLINE rx_vec_i128 rx_set_int_vec_i128(int _I3, int _I2, int _I1, int _I0) {
  434. rx_vec_i128 v;
  435. v.u32[0] = _I0;
  436. v.u32[1] = _I1;
  437. v.u32[2] = _I2;
  438. v.u32[3] = _I3;
  439. return v;
  440. };
  441. FORCE_INLINE rx_vec_i128 rx_xor_vec_i128(rx_vec_i128 _A, rx_vec_i128 _B) {
  442. rx_vec_i128 c;
  443. c.u32[0] = _A.u32[0] ^ _B.u32[0];
  444. c.u32[1] = _A.u32[1] ^ _B.u32[1];
  445. c.u32[2] = _A.u32[2] ^ _B.u32[2];
  446. c.u32[3] = _A.u32[3] ^ _B.u32[3];
  447. return c;
  448. }
  449. FORCE_INLINE rx_vec_i128 rx_load_vec_i128(rx_vec_i128 const*_P) {
  450. #if defined(NATIVE_LITTLE_ENDIAN)
  451. return *_P;
  452. #else
  453. uint32_t* ptr = (uint32_t*)_P;
  454. rx_vec_i128 c;
  455. c.u32[0] = load32(ptr + 0);
  456. c.u32[1] = load32(ptr + 1);
  457. c.u32[2] = load32(ptr + 2);
  458. c.u32[3] = load32(ptr + 3);
  459. return c;
  460. #endif
  461. }
  462. FORCE_INLINE void rx_store_vec_i128(rx_vec_i128 *_P, rx_vec_i128 _B) {
  463. #if defined(NATIVE_LITTLE_ENDIAN)
  464. *_P = _B;
  465. #else
  466. uint32_t* ptr = (uint32_t*)_P;
  467. store32(ptr + 0, _B.u32[0]);
  468. store32(ptr + 1, _B.u32[1]);
  469. store32(ptr + 2, _B.u32[2]);
  470. store32(ptr + 3, _B.u32[3]);
  471. #endif
  472. }
  473. FORCE_INLINE rx_vec_f128 rx_cvt_packed_int_vec_f128(const void* addr) {
  474. rx_vec_f128 x;
  475. x.lo = (double)unsigned32ToSigned2sCompl(load32((uint8_t*)addr + 0));
  476. x.hi = (double)unsigned32ToSigned2sCompl(load32((uint8_t*)addr + 4));
  477. return x;
  478. }
  479. #define RANDOMX_DEFAULT_FENV
  480. void rx_reset_float_state();
  481. void rx_set_rounding_mode(uint32_t mode);
  482. #endif
  483. double loadDoublePortable(const void* addr);
  484. uint64_t mulh(uint64_t, uint64_t);
  485. int64_t smulh(int64_t, int64_t);
  486. uint64_t rotl(uint64_t, unsigned int);
  487. uint64_t rotr(uint64_t, unsigned int);