 tevador
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b71e0eec65
Optimizations to reduce code size under 32K
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7 years ago |
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tevador
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b6d654291f
90 address transformations
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7 years ago |
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tevador
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2f6a599ff6
Inlined calls for memory read
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7 years ago |
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tevador
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619bee5418
Random dataset accesses - asm only
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7 years ago |
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tevador
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3caecc7646
Vector FPU instructions
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7 years ago |
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tevador
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a09bee8d60
js -> jz to enable macro-op fusion on Intel CPUs (~1% speed-up)
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7 years ago |
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tevador
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76b6b05cf2
Unconditional RET
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7 years ago |
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tevador
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740c40b218
8 branch conditions for CALL/RET
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7 years ago |
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tevador
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1db7dd6e8b
Renamed immediate constants
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7 years ago |
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tevador
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ed0bc906d6
JIT compiler for x86
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7 years ago |
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tevador
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4f276541d2
Modified x86 register allocation
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7 years ago |
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tevador
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6332831ec1
Implemented cache shift
|
7 years ago |
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tevador
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cb0721056a
Assembly code generator for Windows 64-bit
|
7 years ago |
