 tevador
|
b71e0eec65
Optimizations to reduce code size under 32K
|
il y a 7 ans |
|
tevador
|
b6d654291f
90 address transformations
|
il y a 7 ans |
|
tevador
|
2f6a599ff6
Inlined calls for memory read
|
il y a 7 ans |
|
tevador
|
619bee5418
Random dataset accesses - asm only
|
il y a 7 ans |
|
tevador
|
3caecc7646
Vector FPU instructions
|
il y a 7 ans |
|
tevador
|
a09bee8d60
js -> jz to enable macro-op fusion on Intel CPUs (~1% speed-up)
|
il y a 7 ans |
|
tevador
|
76b6b05cf2
Unconditional RET
|
il y a 7 ans |
|
tevador
|
740c40b218
8 branch conditions for CALL/RET
|
il y a 7 ans |
|
tevador
|
1db7dd6e8b
Renamed immediate constants
|
il y a 7 ans |
|
tevador
|
ed0bc906d6
JIT compiler for x86
|
il y a 7 ans |
|
tevador
|
4f276541d2
Modified x86 register allocation
|
il y a 7 ans |
|
tevador
|
6332831ec1
Implemented cache shift
|
il y a 7 ans |
|
tevador
|
cb0721056a
Assembly code generator for Windows 64-bit
|
il y a 7 ans |
